Semiconductors
Within Semiconductors Semilab offer a wide range of measurement techniques from precise film thickness to highly sensitive electrical characterisation, with the capability to handle small substrates to 300mm automated handling Fab systems. PulseForge can support thin wafer handling amongst other semi applications. Forge Nano supply ALD wafer processing systems for gate oxide and encapsulation on a wide range of substrates. XTPL can print conductive linewidths down to a single micron.
VISTEC ELECTRON BEAM GMBH
Variable Shaped Beam Technology
Vistec Electron Beam provides electron-beam lithography systems, based on the so called Variable Shaped Beam principle. In a Variable Shaped Beam system the electron beam is formed to variable “electron beam shots”, as rectangles, triangles and slants, by shaping apertures. The shape size can be varied in steps of 1 nm. The maximum shape size depends on the electron-optical column configuration. Position deflection and blanking systems allow accurate shape positioning and exposure on the substrate. The pattern to be exposed is fractured in such a way, which guarantees best pattern fidelity.
In case of high repetitive patterns “Cell Projection” is an option. In addition to the standard shapes more complex characters are used to shape the electron beam, which further improves the throughput.
Both Variable Shaped Beam functionality, as well as the “Write on the fly” stage moving strategy are essential factors to achieve high throughput, especially in comparison to the Gaussian Beam lithography systems. For these reasons Variable Shaped Beam (VSB) technology is well established in decades of industrial application and advanced research and is a proven and matured technology these days.
Semiconductor Wafer Coating:
Lowering the Cost of Ownership with Forge Nano’s Ultra Fast Deposition Patented SMFD-ALD
THEIA: R&D 200mm Wafer Coating Equipment
Capable of ALD processing on single wafers from 75mm to 200mm sizes. Heating of the manifold and reactor up to 200Unique or irregular substrates are easily enabled with customization available upon request.
Forge Nano’s proprietary valving and pressure control enable short ALD steps at cycles less than 3 milliseconds. The dynamic valve manifold enables an unrivaled rapid research and prototyping system. Efficient valve and pressure operation also reduce precursor waste upwards of 40x.
APOLLO: Commercial Scale Wafer Coating
High Throughput Cassette-to-Cassette Wafer Coating System: product line sets new benchmarks in atomic layer deposition productivity and cost effectiveness. Designed for high volume semiconductor wafer-based production, our Semi-S2 certified APOLLO systems utilize the high productivity of SMFD-ALD. The result is a flexible, modular system that can be easily configured to our customers’ needs.
APOLLO provides fully automatic cassette-to-cassette ALD processes with high throughput performance at the lowest cost of ownership and leads in every aspect of ALD productivity, performance and cost, and sets a new standard for efficiency while reducing environmental impact. With its ‘zero-waste’ processing, APOLLO lowers factory power consumption and occupies a smaller footprint on the clean-room floor.
Metrology in Semiconductors
Semilab offer a range of different measurement and application techniques for the semiconductor industry. From starting materials to back-end processing, equipment is available for the testing of bulk contaminants in Silicon with the highest possible sensitivity, for epi resistivity measurement, to control optical and electrical properties of dielectrics on product wafers, for ion implant monitoring and defect detection, for characterization of backend dielectrics, 3D structures, and also for controlling wafer bonding. Measurements can be non-contact and non-destructive. Many techniques are available with different levels of automation, from lab usage with manual operation to full automation.
Compound Material Characterisation
Compound materials enable the production of advanced, easy-to-use power devices, ultra-high frequency radio devices and more. These emerging products become more and more prevalent in electric or hybrid cars for example, or in power management and distribution devices related to renewable energy sources. For reliable production, composition and defects, dopant concentration, electrical and optical qualities must be regularly monitored. Semilab offers several products for this purpose. Most products are non-contact and non-destructive, and in many cases, they reveal properties directly related to device characteristics or performance.
Contamination Analysis & Monitoring
Semilab offers various solutions to analyse semiconductor samples. These are all aimed to give as much information on the subject as possible to help people understand the sources of the behavior and properties of their samples and the effects of the used processes.
Using the state-of-the-art Deep Level Transient Spectroscopy (DLTS) setup of the Semilab DLS-1100, it is possible to perform qualitative and quantile analysis of the electrically active impurities and defects in the semiconductor, although this is a destructive technique. This method provides information about the activation energy of the impurity and capture cross section. It also allows to the detection of concentration impurities down to 5×107 atoms/cm3 depending on the doping concentration.
Semilab’s suite of non-contact metrologies lead the IC industry for in-line detection of ultra-low metallic contamination. Semilab offers full wafer imaging solutions, ranging from the high throughput Photoluminescence Imaging technique (PLI) to more well-established lifetime-based methods, including Suface PhotoVoltage (SPV) and microwave Photoconductance Decay (µ-PCD). The flagship digital SPV technology (FAaST system) is industry standard that leads the world in bulk Fe detection.
There is no disputing the detrimental effect of metallic contamination on the integrity of the critical gate oxide used in integrated circuits. During high temperature processing, contamination in the silicon wafer often precipitates as a defect at the Si/Dielectric interface or segregates to the dielectric – in either case it has the potential to cause premature device failure and a reduction in product yield. The probability of metallic contamination impacting yield is a function of the chip size (e.g. technology node/critical dimension) and the defect density (e.g. the amount of contamination), such that as device dimension decrease, maintaining yield requires a corresponding reduction in contamination. Figure 1 clearly demonstrates the reality of this relationship over the past 25 years, during which time the IC industry has experienced a more than 3 orders of magnitude reduction in typical background Fe concentration observed in new fabs. More importantly the near term projection, where another order of magnitude reduction is needed to meet the requirements of the state-of-the-art Si IC manufacturing, with white pixel reduction in CMOS image sensors being a major stimulus for this effort.
Defect Inspection
“Bulk Micro Defects” (BMD) is a term commonly used to refer to oxygen precipitates in silicon. In fact, many imperfections in the silicon lattice create defects, and BMDs could be any imperfections including oxygen precipitates, voids, inclusions and so on.
BMDs go by many names, referring to the problems they cause, how they were created, or their physical characteristics. Examples include COPs (Crystal Originated Particles) and Grown-In Defects.
Dislocations can be formed during crystal growth, but also at thermal processing of wafers, during CMOS device manufacturing, like epitaxial layer growth and implant anneal steps.
Electrical Characterisation of Dielectrics & Interfaces
Controlling electrical properties of dielectrics and the interfaces they form with semiconductors is imperative for achieving high IC device performance and yield. Semilab offers metrology solutions to electrically characterize the critical dielectric layers and processes that span process modules ranging from FEOL to BEOL.
The most common implementation of Semilab’s in-line electrical metrology is replacement of the IC MOS short-loop, which alleviates the need for expensive and time-consuming processing. The in-line methods provide rapid feedback without the need for preparing devices; resulting in increased process tool utilization time for critical product. The two primary MOS measurements being replaced are; 1) Capacitance – Voltage (C-V) method for determination of Dielectric Capacitance, Dielectric Charges, and Dielectric/Semiconductor Interface Quality; and 2) the Current – Voltage (I-V) method that measures Dielectric Leakage and Breakdown.
EPI Thickness and Resistivity Measurement
A blanket layer of silicon can be added to a silicon substrate by a CVD process to achieve changes in the properties, like resistivity, type and defect density. This CVD process is called epi (or epitaxial) deposition. The thickness monitoring of the epi layer is part of the production process of making the epi wafers. This monitoring is executed on a sample basis, or only to confirm that the epi reactor is set up properly.
A blanket layer of silicon can be added to a silicon substrate by a CVD process to achieve changes in the properties, like resistivity, type and defect density. This CVD process is called epi (or epitaxial) deposition. The thickness monitoring of the epi layer is part of the production process of making the epi wafers. This monitoring is executed on a sample basis, or only to confirm that the epi reactor is set up properly.
Semilab can offer non-contact optical solution for Epi thickness monitoring, depending on infrared reflection techniques.
Ion Implantation Monitoring
Modern semiconductor devices require precisely controlled dopant concentration and position, and this can be achieved by ion implanting with careful annealing. Typically an n-type species is implanted into a p-type material, or the other way around. Typical species to implant can be boron and indium for the p-type, phosphorus, arsenic and antimony for the n-type layer. Implants are monitored by adding a monitor wafer, and the monitor wafers are checked after the implantation and annealing. Alternatively, the monitoring can be performed by using test boxes on product wafers.
Metallisation Control
Semilab announced that it had licensed key patents and transferred technology and know-how related to implant monitoring and metal layer characterization from Applied Materials, Inc. The acquired IP covers systems which are capable of junction depth and implant dose measurements, and determination of metal thickness, via and interconnect resistance on product wafers.
Thin Film Optical Characterisation
Thin film (ITO, OLED, LTPS, IGZO, SiNx, SiOx, photoresist, etc.) thickness and optical properties is one of the key process control parameters. Using Spectroscopic Ellipsometer of Semilab fast (measurement speed is similar to reflectometers) and accurate measurement can be performed at any size of the panel.
Using our advanced analysis software, the following parameters can be determined as well: optical band gap energy, transmission, roughness, crystallinity related parameter (in case of LTPS).
SiOx/Glass structure can be a challenge to measure using conventional optical metrologies, however due to the principle of ellipsometer used in FPT even such low contrast structures can be measured accurately.
Thin Film Thickness Measurement
As the semiconductor industry continues to fulfill Moore’s law, thin film thickness is one of the most rapidly scaled dimensions. Consequently, chip manufacturers must implement metrology systems that will be effective for statistical process control of ultra-thin dielectrics.
Ellipsometry is a non-destructive technique, capable of being used for any transparent and semitransparent medium. It can measure a wide range of layer thickness from a fraction of mono-atomic layer to several micrometers.
Ellipsometry allows the determination of the thickness of single layers and multi-layer stacks. In addition, it allows the absolute characterisation of optical properties of materials by extraction of the N and K data.
Using Spectroscopic Ellipsometry, up to 7 layers can be analysed simultaneously in one measurement in order to extract the thickness of every individual layer. Material optical properties also, can be obtained over a wide spectral range, from Deep UV to near InfraRed.
Unlike other optical techniques, this method requires neither reference sample nor reference beam like reflectometry. Moreover, ellipsometry has the advantage of high sensitivity due to the additional measurement of the phase of light at different wavelengths. As a consequence, it allows analysis of complex structures like multi-layers with rough interfaces and unknown material composition.
Additive Printing in Semiconductors: Removing the Mask!
Equipment manufactures in semiconductor sector are looking for alternatives to replace photolithography with a simpler & cheaper method, yet one that allows for highest precision.
XTPL have developed innovative printing-head and dedicated nanoinks allowing for ultraprecise dispensing and obtaining designed nanostructures for various applications in semiconductor sector. The solution ensures micrometric scale of structures (1-100 µm) required by most semiconductor market players.
XTPL method allows for adding the material to obtain desired patterns in single step process with unmet submicron precision and overall simplicity. Our disruptive technology provides versatility, as it requires no special external conditions and works on most substrates, even ones that are not flat. Additive approach enabled by XTPL lacks complexity required by subtractive photolithography method, that is currently a standard used for this market. XTPL solutions will take into account all requirements of modern semiconductor industry: high throughput, miniaturization of feature size, ultra-precision and control over edge roughness, elimination of expensive masking, decrease of material consumption and material waste, reduction of process complexity, shortening of production time and decrease of overall costs. Combined with XTPL nanoinks tailored for semiconductor industry our technology can be adapted as alternative to photolithography by various subsegments of semiconductor industry.
Printing Interconnects on Ultra Thin Chips on Flexible Substrates
'Heterogeneous Integration' is a promising approach for high-performance hybrid flexible electronics that combine printed electronics and silicon technology. Despite significant progresses made by integrating rigid silicon chips on flexible substrates, the integration of flexible ultra-thin chips (UTCs) on flexible foils remains a challenge as they are too fragile for conventional bonding methods. Reliable interconnects (low-resistivity and mechanical robustness) and bonding of UTCs are critical to the realization of hybrid flexible systems. Herein, using a non-contact printing approach, an easy and cost-effective method for accessing UTCs on flexible foils is demonstrated.
The high-viscosity conductive paste, extruded from a high-resolution printer (1–10 μm line width), is used here to connect the metal oxide semiconductor field effect transistors (MOSFETs) on UTCs with the extended pads on flexible printed circuit boards (PCBs). The electrical characterization of MOSFETs, before and after printing the interconnects, reveals an acceptable level of variation in device mobility (change from 780 to 630 cm2 V−1s−1). This is due to the drop in effective drain bias voltage as a marginally small electrical
resistance (≈30 Ω) is added by the printed interconnects. The bonded UTCs show robust device performance under bending conditions, indicating high reliability of both the chip thinning and bonding methods.
XTPL developed innovative printing-head and dedicated nanoinks allowing for ultraprecise dispensing and obtaining designed nanostructures for various applications in semiconductor sector. The solution ensures micrometric scale of structures (1-100 µm) required by most semiconductor market players.
XTPL method allows for adding the material to obtain desired patterns in single step process with unmet submicron precision and overall simplicity. Our disruptive technology provides versatility, as it requires no special external conditions and works on most substrates, even ones that are not flat. Additive approach enabled by XTPL lacks complexity required by subtractive photolithography method, that is currently a standard used for this market. XTPL solutions will take into account all requirements of modern semiconductor industry: high throughput, miniaturization of feature size, ultra-precision and control over edge roughness, elimination of expensive masking, decrease of material consumption and material waste, reduction of process complexity, shortening of production time and decrease of overall costs. Combined with XTPL nanoinks tailored for semiconductor industry our technology can be adapted as alternative to photolithography by various subsegments of semiconductor industry.